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Silan Semiconductors
ABSOLUTE MAXIMUM RATINGS
(Tamb=25C, All voltage referenced to Vss, unless otherwise specified)
SC9102C/D
Symbol
VDD VIN PD Topr Tstg
Characteristic
Power Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature
Value
6.0 -0.3~VDD+0.3 500 -25~+70 -55~+150
Unit
V V mW C C
ELECTRICAL CHARACTERISTICS
(Tamb=25C , VDD=2.5V, fosc=3.579545MHz, unless otherwise specified)
Parameter
Symbo l
VDD
Conditions
Tone/Pulse Memory retension Tone Pulse, OFF-HOOK, Keypad entry, no load ON-HOOK No keypad entry ,no load VDD=1.0V
Min
2.0 1.0
Typ
Max
5.5 5.5
Unit
Operating Voltage
V
0.6 0.2 0.1 0.1 VSS 0.7VDD
2 0.6 5 0.1 0.3VDD VDD 1 mA
Operating Current
IOP
Standby Current Memory Retension Current Control Pin Input Low Voltage Control Pin Input High Voltage XMUTE Pin Leakage Current XMUTE Pin Sink Current
HKS Pin Input Current
IS Imr Vil Vih Imth Imtl Ihks Ikbd Ikbs tDB Ipoh Ipol fpr tM tB
A A V A mA A A ms
V XMUTE =12.0V V XMUTE =0.5V Vhks=2.5V Vn=0V note1 Vn=2.5 note1 4 200 10 400 20 Vpo=12V Vpo=0.5V -1. 0 -----3.0 10 20 40:60 33:66 1
0.1 30
Keyboard Scanning Pin Pulse Mode
Drive Current Sink Current
Key-in Debounce Time Pulse Output Pin Leakage Current Pulse Output Pin Sink Current Pulse Rate Make/Break Ratio
1.0 ------
A mA pps %
(to be continued)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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(continued)
SC9102C/D
Conditions
M/B ratio=40:60 M/B ratio=33:66 M/B ratio=40:60 M/B ratio =33:66 Pulse rate=10pps Pulse rate=20pps VDD=2.0V~5.5V Vdtmf=0.5V Row group RL=10K Dist.<=-23dB VDD=2.0~5.5 V RL=10K Auto redial Auto redial
Parameter
Pre-digit Pause Pulse rate=10pps Pre-digit Pause Pulse rate=20pps Inter-digit Pause Tone Mode DC Level Tone Output Pin Sink Current AC level Load Resistor DTMF Signal Pre-emphasis Distortion(note 2)
Symbol
tPDP tPDP tIDP
Min
------0.45VDD 0.15 120 10 1 ----
Typ
40 33 20 16.5 800 600 0.55VDD -150 -2 -30 100 106
Max
------0.7VDD -180 -3 -23 ---
Unit
ms ms ms
Vdc Itl Vdtmf R1 twist Dist. tTD tTTP
V mA mVrms K dB dB ms ms
Minimum tone duration Time Minimum Intertone Pause Time
Note: 1. Vn: Input voltage of any keyboard scanning pin (Row group, Column group) 2 Distortion (dB) = 20log{[V12+V22+V32+...Vn2)1/2]/[(VL2+VH2)1/2]} VL,VH: Row group and Column group signal V1 V2... Vn: Harmonic signal (BW = 300Hz~3500Hz
ACTUAL FREQUENCY OUTPUT (fosc=3.579545MHz)
Keyboard Scanning Pin
R1 R2 R3 R4 C1 C2 C3 f1 f2 f3 f4 f5 f6 f7
Standard(Hz)
697 770 852 941 1209 1336 1477
Output
699 766 848 948 1216 1332 1472
Deviation(%)
+0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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PIN DESCRIPTION
Pin No.
15
SC9102C/D
Description
Pin Name
C1
*Provides keyboard scanning. * HKS pin is LOW, the column group stays in "HIGH" and row group stays in "LOW" state. *The keypad is compatible with the standard dual contact matrix keyboard (as figure1b), the inexpensive single contact keyboard (as figure 1a), and electronic input (as figure 1c). *When HKS is "LOW", a valid key entry is defined by related Row & Column
16
C2
17
C3
connection or by electronic input. *Activation of two or more keys will result in no response, except for single key. *To avoid keyboard-bouncing error, this chip provides built-in debounce circuit. (The
18
C4
debounce time = 20ms)
1
R1
Row
Column
Row Column
Figure1a: Single contact form keyboard configuration
Figure1b: Dual contact form keyboard configuration
2
R2
Row
3
VDD VSS
R3
Column
4
VDD VSS
R4
Figure1c: Electronic signal input keyboard configuration
*Oscillator input & output pins. 8 OSCI *The 3.579545MHz oscillator is formed by a built-in inverter inside of this chip and by connecting a 3.579545MHz crystal or a ceramic resonator across the OSCI and OSCO pins. (built-in feedback resistor and capacitor) *When HKS is "LOW", a valid key-in may turn on this oscillator and generates a 3.579545 MHz clock. (to be continued)
9
OSCO
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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(continued)
SC9102C/D
Description
Pin No.
Pin Name
*Mute output pins.
*NMOS open drain output structure. 13
XMUTE
*The output is in "LOW" state during dialing sequence (both Pulse and Tone mode) otherwise this pin is "high-impedance". *Long (continue) Mute.
11 10
VSS VDD
*Negative power supply pin. *Positive power supply pin. *Hook switch input pin. *When the handset is in ON-HOOK state, this pin must be pulled "high" in order to
5
HKS
disable the dialing operation and decrease the power consumption. *When in OFF-HOOK state, the HKS pin must be pulled "low" state for all function operation. *Pulse output signal pin. *NMOS open drain output structure. *The output is "LOW" during pulse dialing and Flash operation, otherwise this output is "floating". *Dual Tone Multi-frequency output pin. *In TONE mode, when an entry of digit key (include *, # key), this pin will send out a corresponding DTMF signal. *The TONE pin provides minimum tone duration and minimum intertone pause time to support rapid key-in. If key-in time is less than 100ms, DTMF signal will last for 100ms; otherwise the tone duration will last as long as the key is pressed. *Mode selection pin.
14
PO
12
TONE
MODE
VDD Open VSS
Dialing mode
Pulse mode Pulse mode Tone mode
7
MODE
*Three-state input structure. *This pin can select the three modes shown on the right.
6
M/B
*M/B ration selection pin. (The function seeing the Dialing signal option table)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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KEYBOARD OPERATION
Symbol definitions:
a) b) c) d) e) f) g) h) i) j) k) l) m) D1~Dn Dp1~Dpn Dt1~Dtn tF tP tPT tFP tRP LNB : : : : : : : : : : : : : OFF-HOOK or enable Hand Free function. ON-HOOK or disable Hand Free function. Input level from low to high. Input level from high to low.
SC9102C/D
Digit key 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, *, #, (C1~Cn is same as D1~Dn). Pulse digit Tone digit Flash time. Pause time. Pulse to Tone wait time. Pause time for flash. Pause time for redial. Last number redial buffer. 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, *, #, (Cp1~Cpn is same as Dp1~Dpn). 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, *, #, (Ct1~Ctn is same as Dt1~Dtn).
A Normal Dialing
1. Digit Dialing Procedure Dial out Dial out LNB 2. Dialing with flash key Procedure Dial out Dial out LNB F, D1, D2..., Dn tF, tFP, Dt1, Dt2..., Dtn (in Tone mode) tF, tFP, Dp1, Dp2, ..., Dpn (in Pulse mode) D1, D2..., Dn D1, D2..., Dn Dt1, Dt2..., Dtn (in Tone mode) Dp1, Dp2,..., Dpn (in Pulse mode) D1, D2..., Dn
3. Dialing with PT key Procedure Dial out LNB D1, D2 ..., PT , ..., Dn Dp1, Dp2, ..., tPT, ..., Dpn (in Pulse mode) D1, D2 ..., PT , ..., Dn
Note: If key in digit over maximum digit stored in LNB, then RD is inhibit even after on/off hook.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
B Mixed dialing
Procedure Dial out LNB D1, D2..., PT , D9, D10 ..., Dn Dp1, Dp2, ..., tPT, Dt9, Dt10..., Dtn D1, D2..., PT , D9, D10 ..., Dn
C Redial
LNB Procedure Dial out Dial out D1, D2..., Dn RD tRP, Dt1, Dt2..., Dtn (in Tone mode) tRP, Dp1, Dp2,..., Dpn (in Pulse mode)
Note: If key in digit over maximum digit stored in LNB, then RD is inhibit.
D Pause Function
Procedure Dial out Dial out LNB D1, D2..., Dn, P, C1 ..., Cn Dt1, Dt2 ,..., Dtn , tP, Ct1 ..., Ctn (in Tone mode) Dp1, Dp2, ..., Dpn , tP, Cp1 ..., Cpn (in Pulse mode) D1, D2..., Dn, P , C1, C2 ..., Cn
E Flash Function
Procedure Dial out Dial out LNB D1, D2..., Dn, F, C1 ..., Cn Dt1, Dt2,..., Dtn , t F, tFP, Ct1 ..., Ctn (in Tone mode) Dp1, Dp2,..., Dpn , tF, tFP, Cp1 ..., Cpn (in Pulse mode) C1, C2 ..., Cn
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
Standby current
TEST CIRCUIT
1
Operation current
V+
2
V+
A
A
VDD
keyboard
HKS
MODE VSS
DP DP DT
VDD
HKS
VSS
3 Tone output voltage
V+
4 counter and AC meter
TONE
Tone distortion
V+
VDD
VDD
keyboard
VSS
Spectrum analyzer
TONE HKS
keyboard
10K VSS
HKS
V
10K
5
Pulse output sink current (open drain structure)
V+
6
Pulse output sink current (inverter structure)
V+
Flash key
VDD
PO HKS
A V
VEXT
VDD
HKS PO VSS
A V
VEXT
VSS
7 Keypad input current (row group)
V+
8 keypad input current (column group)
V+
A
ROW
VDD
R* C*
VDD COLUMN
R* C*
HKS VSS MODE
A
HKS VSS MODE
Note: 1. Dist. (dB)=20log{[V12+V22+V32+...Vn2)1/2]/[(VL2+VH2)1/2]} a. V1...Vn are extraneous frequencies (ie, inter modulation and harmonic), components in the 500Hz to 3400Hz band. b. VL,VH are the individual frequency components of DTMF signal. c. Whether keyboard is pushed refer to the TONE mode time diagram. 2. Sink current Isink=I/(1-Duty Cycle), I is the net DC current measured from ampere meter.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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3. R*, C* mean other column and row.
SC9102C/D
TIMING DIAGRAMS
HKS 3 KEY IN
tDB
2
3
XMUTE PO TONE
tTD tITP tITP tITP
OSCO Normal dialing Tone Mode Timming Diagram ......High impedance
HKS 3 KEY IN
tDB
2
3
XMUTE
tPDP tB tTD tIDP tM
PO TONE OSCO
tIDP
tIDP
Normal dialing
......High impedance
Pusle Mode Timming Diagram
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
TIMING DIAGRAMS (continued)
HKS 3 KEY IN
tDB
2
PT
3
XMUTE
tPDP
PO TONE OSCO ......High impedance Timming Waveform for mixed dialing Operation (by */T key entry) HKS 3 KEY IN MODE
tDB tTD tITP tITP tPT tITP
2
3
XMUTE
tPDP
PO
tIDP tIDP tIDP
TONE OSCO ......High impedance Timming Waveform for mixed dialing Operation (by MODE pin entry)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
TIMING DIAGRAMS(continued)
HKS 3 KEY IN
tDB
2
RD
XMUTE PO
tITP tITP
tRP
tITP tTD
tITP
TONE OSCO
......High impedance Tone Mode Redial Timming Diagram
HKS 3 KEY IN
tDB
2
RD
XMUTE
tRP tIDP tIDP
PO
tIDP tIDP
TONE OSCO
......High impedance Pulse Mode Redial Timming Diagram
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
TIMING DIAGRAMS(continued)
HKS KEY IN
3
tDB
2
P
3
XMUTE PO TONE OSCO
tPDP
tIDP
tIDP
tP
tIDP
tDB
XMUTE PO
tITP tITP tP tITP
TONE OSCO ......High impendance Pause key operating timming
HKS KEY IN
3
tDB
XMUTE PO TONE OSCO ......High impedance Flash key operating timming
tF tFP
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
TYPACAL APPLICATION CIRCUIT
1N4148x4 Tip ON/OFF HOOK 22M 100k A92 1N4148x2 2.2k
VDD C945
220k
100k
Ring ZNR 120V
3.3k
100k
2-4 Speech network
1F 100k
5V
100F
A42
220k
14
1 4 7 */P 2 5 8 0 3 6 9 PT F P
10 VDD
5 HKS TONE 12
1.5k
C945
1 R1 2 R2 3 R3 4 R4
PO
0.02F
200
OSCI 8
SC9102C/D
OSCO 9 M/B 6
VDD VDD 3.579545MHz
#/RD RD
C4 C3 C2 C1 VSS MODE 18 17 16 15 11 7
XMUTE 13
DP DP DT
1000pF
33.3/66.6 10pps 33.3/66.6 20pps 40/60 10pps
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
CHIP TOPOGRAPHY
17 18
16
15
14
13
12 11
1 2 10 9
3 8 4 5 6
2
7
Chip size: 1.35 x 1.33 mm
PAD COORDINATES (Unit: m)
Pad No. Symbol X Y Pad No. Symbol X Y
1 2 3 4 5 6 7 8 9
P1 P2 P3 P4 P5 P6 P7 P8 P9
-545.0 -545.0 -539.0 539.0 21.2 191.0 362.5 529.5 540.5
276.0 109.0 -266.0 -453.5 -528.0 -528.0 -381.5 8.5 176.4
10 11 12 13 14 15 16 17 18
P10 P11 P12 P13 P14 P15 P16 P17 P18
542.2 541.3 541.0 324.3 131.0 -27.0 -199.5 -373.0 -545.0
176.4 349.5 530.5 531.5 533.0 531.5 531.5 531.5 463.5
Note: The original point of the coordinate is the die center.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
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SC9102C/D
UNIT: mm
2.54
PACKAGE OUTLINE
DIP-18-300-2.54
0.25
6.40B
1.52 +0.3 -0 23.12B0.3
7.62
15 Degree
0.5MIN
0.46B0.08
1.27MAX
HANGZHOU SILAN MICROELECTRONICS CO.,LTD.
Rev: 2.0 2001-11-02
16
3.00MIN
4.36MAX
0.25B 0.05

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